1. Field of the Invention
The present invention relates to a method of filling or plugging metal in through-holes formed in a single-crystals silicon substrate used for a silicon semiconductor device, an interposer and so forth.
In the case of three-dimensionally mounting components on a silicon substrate, the most difficult matter is to electrically connect the circuit wiring formed on the upper surface with the circuit wiring formed on the lower surface of the silicon substrate.
2. Description of the Related Art
Conventionally, electrical continuity is accomplished between the upper and the lower surfaces of a silicon substrate as follows. After through-holes are formed in the silicon substrate, penetrating the upper and the lower surfaces, metal is plugged into the through-holes, and circuit patterns on the upper and the lower surfaces of the silicon substrate are connected with each other by the metal conductor plugged in the through-holes.
For example, Japanese Unexamined Patent Publication No. 1-258457 discloses a method of manufacturing a semiconductor integrated circuit in which through-holes are formed in a silicon mounting substrate made of a single crystal of silicon and the single-crystal silicon substrate is coated with an insulating film by means of thermal oxidation and the through-holes are plugged with metal. In the official gazette of the patent publication, there is disclosed a technique in which an electrode for plating is attached to the main surface of the silicon mounting substrate and the through-holes are plugged with metal by means of plating.
According to the above conventional methods of plugging the through-holes in the silicon substrate, there is a problem in which minute voids are generated in the metal plugged into the through-holes by means of plating. Therefore, it is impossible to plug the through-holes with metal precisely and densely. In order to prevent the generation of the above minute voids, investigations have been made into a method in which, after the through-holes were plugged with metal by means of plating, the reverse surface of the silicon substrate is ground so as to expose the plugged metal. However, even when the above countermeasure was taken, it was impossible to prevent the generation of minute voids in the plugged metal. Therefore, it was found impossible to obtain plugs consisting of sufficiently precise and dense metal. Accordingly, in the method of prior art, the reliability of the via wiring on the semiconductor wafer was low, and the yield was deteriorated.
It is, accordingly, an object of the present invention to provide a method of plugging through-holes in a silicon substrate with metal in the case where, after the through-holes are formed on the silicon substrate and these through-holes are plugged with metal by means of plating, the method being characterized in that the generation of minute voids in the plugged metal is prevented so that the through-holes can be plugged with precise and dense metal.
According to the present invention, there is provided a method of plugging through-holes in a silicon substrate comprising the following steps of: providing the silicon substrate having first and second surfaces with through-holes penetrating from the first surface to the second surface; forming the first and second surfaces of the silicon substrate including inner wall faces of the through-holes with an insulating film; adhering a conductor plane to the second surface of the silicon substrate by means of an adhesive; etching the adhesive via the through-holes from the first surface of the silicon substrate to drill the adhesive so that the conductor plane is exposed in inside of the through-holes; filling the through-holes with a metal by plating the metal using the conductor plane as an electrode from the first surface of the silicon substrate; peeling off the conductor plane and smoothing the first and second surfaces of the silicon substrate including the filled metal; and conducting a high-pressure annealing on the silicon substrate.
It is advantageous that the insulating film formed on the first and second surfaces of the silicon substrate including the inner wall faces of the through-holes is an oxide film (SiO2 film) formed by means of chemical vapor-deposition (CVD) or thermal treatment.
It is also advantageous that the etching step of the adhesive film is conducted by plasma etching. The smoothing step of the first and second surfaces of the silicon substrate is conducted by chemical mechanical polishing (CMP).
The step of high-pressure annealing on the silicon substrate is conducted under a pressure of 150 MPa at a temperature of 350xc2x0 C. in the atmosphere of argon. Also, the adhesive is preferably an adhesive film. The metallic plane is preferably a copper foil.